Etched
Etched
Posted 3 months ago
Internship
San Jose, California
In Person
Smart Summary
Responsibilities
Design microarchitecture and implement logic in Verilog for AI inference systems. Participate in the full design cycle from initial discussions to synthesis and timing feedback.
Qualifications
You are making progress towards a degree in electrical engineering, computer engineering, or a related field, and have familiarity with high-speed digital logic and ASIC/SoC design concepts. You also have exposure to hardware description languages like SystemVerilog, verification methodologies, and potentially physical design flows or scripting languages like Python.
Must Have Skills for ATS
SystemVerilog
UVM
Python
Verilog
ASIC
SoC
RTL
transformer models
machine learning
Job Description
About Etched
Etched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
Job Summary
As an RTL Intern at Etched, you will help design microarchitecture and implement logic in verilog. You will work with cutting-edge machine learning architectures, contribute to RTL block development, and participate in the full design cycle—from microarchitecture discussions to synthesis and timing feedback. You do not necessarily need prior ML/AI hardware experience; just the ability to learn quickly in a fast-paced, high-autonomy environment.
You may be a good fit if you have
Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field.
Familiarity with high-speed digital logic
Exposure to ASIC or SoC design concepts
Familiarity with SystemVerilog, UVM, or Python
Familiarity with verification work and writing test benches
Familiarity with physical design flows and tooling
Are able to learn quickly about transformers and other aspects of modern artificial intelligence
Strong candidates may also have experience with
Familiarity with transformer models and machine learning
Familiarity with numerical representations and functions
Familiarity with clocking and reset schemes
Ability to program with Python or another scripting language
We encourage you to apply even if you do not believe you meet every single qualification.
Program details
12-week paid internship
Generous housing support for those relocating
Daily lunch and dinner in our office
Based at our office in San Jose, CA
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com
How we’re different
Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
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