FPGA Development Intern (Fall 2026 - 4-8 months)

Ciena

Posted 3 months ago

Internship

Atlanta, Georgia

In Person

Smart Summary

Responsibilities

Participate in the design, test, and support of optical networking products using FPGA design and verification methodologies. Contribute to the full FPGA design life cycle from concept to release using SystemVerilog and UVM.

Qualifications

You are pursuing a Bachelor's degree in Electrical or Computer Engineering, with foundational knowledge of circuit design and digital logic. You will gain experience in FPGA design and verification methodologies, including using SystemVerilog and UVM.

Must Have Skills for ATS

SystemVerilog

UVM

Verilog

Python

TCL

Bash

Questa

VCS

Quartus

Vivado

Job Description

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact.

The Opportunity:

4 month work term: September 2026 – December 2026

8 month work term: September 2026 – May 2027

How You Will Contribute:

The FPGA development team is seeking eligible co-op candidates to participate in the design, test, and support of optical networking products.  You will be introduced to FPGA design and verification methodologies where we place a significant emphasis on early in career development through our FPGA curriculum and mentorship programs.

You will learn and contribute to:

  • FPGA design using SystemVerilog for AMD, Intel, and Lattice FPGAs.

  • FPGA verification using Universal Verification Methodology (UVM).

  • Technical documentation writing and datasheet analysis.

  • The life cycle of an FPGA design from concept to release.

The Must Haves:

  • Working towards completion of a Bachelor’s degree in Electrical Engineering, Computer Engineering or equivalent.

  • Foundational knowledge of circuit design and digital logic.

  • Excellent verbal and written communication skills. 

Assets:

Familiarity with the following:

  • Hardware description languages such as Verilog or SystemVerilog.

  • Scripting and command languages such as Python, TCL, or Bash.

  • FPGA development tools such as Questa, VCS, Quartus, or Vivado.


Pay Range: The pay range for this position is $27.00 - $42.00

Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available.


In addition to competitive compensation, Ciena offers students access to the Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation pay as required by applicable laws.

At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard.  Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.

Ciena is an Equal Opportunity Employer, including disability and protected veteran status.

If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

Ciena

Ciena (NYSE:CIEN) is the global leader in high-speed connectivity. We build advanced networks to support exponential growth in bandwidth demand—empowering our customers, partners, and communities to thrive in the AI era. With unparalleled expertise and innovation, our networking systems, interconnects, automation software, and services revolutionize data transmission and network management.
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