Altera
Altera
Posted 2 months ago
Internship
San Jose, California
In Person
Smart Summary
Responsibilities
You will research, design, and optimize software for the Quartus compiler to improve FPGA device performance and routing. Responsibilities include developing support for next-generation devices, managing compiler modules, and implementing new features while troubleshooting existing code.
Qualifications
You are currently pursuing a PhD in Electrical & Computer Engineering. You have experience in developing software support for next-generation FPGA devices, device modeling, timing closure, runtime, and implementing/fixing software features.
Must Have Skills for ATS
FPGA
Quartus
Place and Route
HDL
High Level Synthesis
FPGA AI Suite
DSP Builder
Job Description
We are looking for a passionate and energetic Software Engineer-Intern to join our team at Altera®. Altera is the pioneer of programmable logic solutions, enabling system and semiconductor companies to rapidly and cost effectively innovate, differentiate and win in their markets. Altera combines the programmable logic technology with software tools, intellectual property, and customer support to provide high-value programmable solutions to many customers worldwide.
In this role, you will be researching/designing/developing/optimizing software for Quartus, the compiler that programs all current/next generation of Field Programmable Gate Array (FPGA) devices.
Quartus is used by all FPGA acceleration technologies (including High Level Synthesis, FPGA AI Suite, DSP Builder, etc)
At the heart of Quartus is our Place and Route engine which is responsible for transforming HDL to bits such that a user's design is optimized for area and Fmax
Cross-functional interactions with various customers (internal and external)
Best of both worlds, hardware and software:
Customer's hardware requirements: Fmax, throughput, timing closure and area
Compiler SW optimizations: runtime and memory, including abstractions and frameworks for acceleration with the FPGA for domains such as deep learning, DSP algorithms, or data analytics
As part of the Quartus team, your responsibilities will include, but are not limited to:
Developing software support for successful routing of the latest next generation FPGA devices
Owning various modules of the compiler from device modeling to timing closure to runtime
Implementing new features in addition to root-causing and fixing the existing ones, while maneuvering your way through a big code base
The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.
$105K - $110K USD
We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations.
Minimum Qualifications
The candidate must be currently pursuing a PhD in Electrical & Computer Engineering and experience in:
Developing software support for successful routing of the latest next generation FPGA devices
Device modeling, timing closure and runtime
Implementing new features in addition to root-causing and fixing the existing ones
Altera
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